A widely read and authoritative book for hardware and software designers. This innovative book exposes the characteristics of performance-optimal single- and multi-level cache hierarchies by approaching the cache design process through the novel perspective of minimizing execution time.2005. aThe automatic improvement of locality in storage systems.a ACM Trans. Computers, 23(4), 424a473, 2005. Z. Hu, S. ... 621a630, 2002. I. Hur and C. Lin. 2004. aAdaptive history-based memory schedulers.a In Proc. 37th Int. Symp. on Microarchitecture (MICRO), December 2004. J. Huynh ... aCheckpoint repair for out-of-order execution machines. ... PowerPC 601 RISC Microprocessor Usera#39;s Manual.
|Title||:||Cache and Memory Hierarchy Design|
|Author||:||Steven A. Przybylski|
|Publisher||:||Morgan Kaufmann - 1990|