CMOS LogicIntroduction to logic families, CMOS logic, CMOS steady state electrical behavior, CMOS dynamic electrical behavior, CMOS logic families.Bipolar Logic and Interfacing Bipolar logic, Transistor logic, TTL families, CMOS/TTL interfacing, Low voltage CMOS logic and interfacing, Emitter coupled logic, Comparison of logic families, Familiarity with standard 74XX and CMOS 40XX series, ICs-Specifications.The VHDL Hardware Description Language Design flow, Program structure, Types and constants, Functions and procedures, Libraries and packages.The VHDL Design ElementsStructural design elements, Data flow design elements, Behavioral design elements, Time dimension and simulation synthesis.Combinational Logic DesignDecoders, Encoders, Three state devices, Multiplexers and demultiplexers, Code converters, EX-OR gates and parity circuits, Comparators, Adders and subtractors, ALUs, Combinational multipliers. VHDL code for the above ICs.Design Examples (using VHDL) Design examples (using VHDL) Barrel shifter, Comparators, Floating-point encoder, Dual parity encoder.Sequential Logic Design Latches and flip-flops, PLDs, Counters, Shift register and their VHDL models, Synchronous design methodology, Impediments to synchronous design.Memories ROMs : Internal structure, 2D-decoding commercial types, Timing and applications. Static RAM : Internal structure, SRAM timing, Standard SRAMS, Synchronous SRAMS.Dynamic RAM : Internal structure, Timing, Synchronous DRAMs. Familiarity with component data sheets-Cypress CY6116, CY7C1006, Specifications.4.11 shows the 4 x 16 decoder using two 3x8 decoders. 74LS138(1) A- Fig. 4.11 4:16 decoder using two 74LS138 ICs (3 : 8 decoder) Here, one input line (D) is used to enable/disable the decoders. When D = 0, the top decoder is enabled andanbsp;...

Title | : | Digital Ic Applications |

Author | : | D.A.Godse A.P.Godse |

Publisher | : | Technical Publications - 2009-01-01 |

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