The book provides a comprehensive coverage of different aspects of low power circuit synthesis at various levels of design hierarchy; starting from the layout level to the system level. For a seamless understanding of the subject, basics of MOS circuits has been introduced at transistor, gate and circuit level; followed by various low-power design methodologies, such as supply voltage scaling, switched capacitance minimization techniques and leakage power minimization approaches. The content of this book will prove useful to students, researchers, as well as practicing engineers.5.20a. A singlephase clock has two states (low and high) and two edges per period. The schematic diagram of a single-phase dynamic nMOS inverter is shown in Fig. 5.20b. Operation of a single-phase inverter circuit is explained below.
|Title||:||Low-Power VLSI Circuits and Systems|
|Publisher||:||Springer - 2014-11-17|