Semiconductor Device Modeling with Spice

Semiconductor Device Modeling with Spice

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B. J. Sheu, MOS Transistor Modeling and Characterization for Circuit Simulation, Electronics Research Laboratory, Rep. No. ERL-M85/85, University of California, Berkeley, 1985. 30. M.-C. Jeng, B. J. Sheu, and P. K. Ko, BSIM Parameter Extraction, Algorithms and Usera#39;s Guide, Electronics Research Laboratory, ... Circuit Simulation and Analysis Using PSPICE, Prentice-Hall, Englewood Cliffs, N.J., 1988.

Title:Semiconductor Device Modeling with Spice
Author:Giuseppe Massabrio, Paolo Antognetti
Publisher:McGraw Hill Professional - 1998-12-01


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