An effective and cost efficient protection of electronic system against ESD stress pulses specified by IEC 61000-4-2 is paramount for any system design. This pioneering book presents the collective knowledge of system designers and system testing experts and state-of-the-art techniques for achieving efficient system-level ESD protection, with minimum impact on the system performance. All categories of system failures ranging from aharda to asofta types are considered to review simulation and tool applications that can be used. The principal focus of System Level ESD Co-Design is defining and establishing the importance of co-design efforts from both IC supplier and system builder perspectives. ESD designers often face challenges in meeting customers' system-level ESD requirements and, therefore, a clear understanding of the techniques presented here will facilitate effective simulation approaches leading to better solutions without compromising system performance. With contributions from Robert Ashton, Jeffrey Dunnihoo, Micheal Hopkins, Pratik Maheshwari, David Pomerenke, Wolfgang Reinprecht, and Matti Usumaki, readers benefit from hands-on experience and in-depth knowledge in topics ranging from ESD design and the physics of system ESD phenomena to tools and techniques to address soft failures and strategies to design ESD-robust systems that include mobile and automotive applications. The first dedicated resource to system-level ESD co-design, this is an essential reference for industry ESD designers, system builders, IC suppliers and customers and also Original Equipment Manufacturers (OEMs). Key features: ac Clarifies the concept of system level ESD protection. ac Introduces a co-design approach for ESD robust systems. ac Details soft and hard ESD fail mechanisms. ac Detailed protection strategies for both mobile and automotive applications. ac Explains simulation tools and methodology for system level ESD co-design and overviews available test methods and standards. ac Highlights economic benefits of system ESD co-design.... pictures of (a) CDM, (b) HBM, and (c) IEC stress damages correction or the system operator has reset the system. ... (2009) Comparing cable discharge events to IEC 61000-4-2 or ISO 10605 discharges. ... Audi, BMW, Daimler, Porsche, Volkswagen (2012) Hardware Requirements for LIN, CAN and FlexRay Interfaces inanbsp;...
|Title||:||System Level ESD Co-Design|
|Author||:||Charvaka Duvvury, Harald Gossner|
|Publisher||:||John Wiley & Sons - 2015-08-04|